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LHF08CTE
Table 4. Command Definitions (9)
11
Bus Cycles
First Bus Cycle
Second Bus Cycle
Command
Req’d.
Notes
Oper (1)
Addr (2)
Data (3)
Oper (1)
Addr (2)
Data (3)
Read Array/Reset
1
Write
X
FFH
Read Identifier Codes
Read Status Register
≥ 2
2
4
Write
Write
X
X
90H
70H
Read
Read
IA
X
ID
SRD
Clear Status Register
1
Write
X
50H
Block Erase
2
5
Write
BA
20H
Write
BA
D0H
40H
Byte Write
2
5,6
Write
WA
or
Write
WA
WD
10H
Block Erase and Byte Write
Suspend
Block Erase and Byte Write
Resume
1
1
5
5
Write
Write
X
X
B0H
D0H
Set Block Lock-Bit
Set Master Lock-Bit
Clear Block Lock-Bits
2
2
2
7
7
8
Write
Write
Write
BA
X
X
60H
60H
60H
Write
Write
Write
BA
X
X
01H
F1H
D0H
NOTES:
1. BUS operations are defined in Table 3.
2. X=Any valid address within the device.
IA=Identifier Code Address: see Figure 4.
BA=Address within the block being erased or locked.
WA=Address of memory location to be written.
3. SRD=Data read from status register. See Table 7 for a description of the status register bits.
WD=Data to be written at location WA. Data is latched on the rising edge of WE# or CE# (whichever goes high
first).
ID=Data read from identifier codes.
4. Following the Read Identifier Codes command, read operations access manufacturer, device, block lock, and
master lock codes. See Section 4.2 for read identifier code data.
5. If the block is locked, RP# must be at V HH to enable block erase or byte write operations. Attempts to issue a
block erase or byte write to a locked block while RP# is V IH .
6. Either 40H or 10H are recognized by the WSM as the byte write setup.
7. If the master lock-bit is set, RP# must be at V HH to set a block lock-bit. RP# must be at V HH to set the master
lock-bit. If the master lock-bit is not set, a block lock-bit can be set while RP# is V IH .
8. If the master lock-bit is set, RP# must be at V HH to clear block lock-bits. The clear block lock-bits operation
simultaneously clears all block lock-bits. If the master lock-bit is not set, the Clear Block Lock-Bits command can
be done while RP# is V IH .
9. Commands other than those shown above are reserved by SHARP for future device implementations and
should not be used.
Rev. 1.3
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